SSE2

SSE2 is one of the IA-32 SIMD instruction sets, designed by Intel. It extends the earlier version SSE instruction set, and is intended to fully supplant MMX.

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SSE2 adds support for 64-bit double-precision floating point and for 64, 32, 16 and 8-bit integer operations on the eight 128-bit XMM registers first introduced with SSE. SSE2 adds no additional program state to that provided by SSE.

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The addition of 128-bit integer SIMD operations allows the programmer to completely avoid the eight 64-bit MMX registers "aliased" on the original IA-32 floating point register stack. This permits mixing integer SIMD and scalar floating point operations without mode switching required between MMX and x87 floating point operations. However, this is overshadowed by the value of being able to perform integer SIMD operations on the wider SSE registers.

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Other SSE2 extensions include a set of cache-control instructions intended primarily to minimize cache pollution when processing indefinite streams of information, and a sophisticated complement of numeric format conversion instructions.

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SSE2 was first introduced by Intel with the initial version of the Pentium 4 in 2001.

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SSE2 has itself been extended by SSE3, also known as "Prescott New Instructions", introduced by Intel to the Pentium 4 in early 2004.

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Rival chip-maker AMD later added support for SSE2 with the introduction of their Opteron and Athlon 64 ranges of 64-bit CPUs, in 2003. However, AMD extended SSE2 out beyond Intel's original implementation by doubling the number of XMM registers, from 8 to 16, i.e. XMM0 through XMM15. The additional registers are only visible when the processor is running in the 64-bit long mode using AMD64 technology. Intel also eventually adopted the additional XMM registers in 2004 along with the AMD64 (aka EM64T) architecture.

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IA-32: IA-32, sometimes generically called x86-32, is the computer architecture of Intel's most successful microprocessors. Within various programming language directives it is also referred to as "i386". The term may be used to refer to the 32-bit extensions to the original x86 architecture, or to the arc...

SIMD: In computing, SIMD (Single Instruction, Multiple Data) is a set of operations for efficiently handling large quantities of data in parallel, as in a vector processor or array processor. First popularized in large-scale supercomputers (as opposed to MIMD parallelization), smaller-scale SIMD operation...

Instruction set: An instruction set, or instruction set architecture (ISA), describes the aspects of a computer architecture visible to a programmer, including the native datatypes, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O (if any)....